The floating-point intrinsics listed here are designed for the IntelŪ PentiumŪ 4 processor with Streaming SIMD Extensions 3 (SSE3).
The results of each intrinsic operation are placed in the registers R0 and R1.
To see detailed information about an intrinsic, click on that intrinsic name in the following table.
The prototypes for these intrinsics are in the pmmintrin.h header file.
Intrinsic Name |
Operation | Corresponding SSE3 Instruction |
---|---|---|
_mm_addsub_pd | Subtract and add | ADDSUBPD |
_mm_hadd_pd | Add | HADDPD |
_mm_hsub_pd | Subtract | HSUBPD |
_mm_loaddup_pd | Duplicate | MOVDDUP |
_mm_movedup_pd | Duplicate | MOVDDUP |
extern __m128d _mm_addsub_pd(__m128d a, __m128d b);
Adds upper vector element while subtracting lower vector element.
R0 | R1 |
---|---|
a0 - b0; | a1 + b1; |
extern __m128d _mm_hadd_pd(__m128d a, __m128d b);
Adds adjacent vector elements.
R0 | R1 |
---|---|
a0 + a1; | b0 + b1; |
extern __m128d _mm_hsub_pd(__m128d a, __m128d b);
Subtracts adjacent vector elements.
R0 | R1 |
---|---|
a0 - a1; | b0 - b1; |
extern __m128d _mm_loaddup_pd(double const * dp);
Duplicates a double value into upper and lower vector elements.
R0 | R1 |
---|---|
*dp; | *dp; |
extern __m128d _mm_movedup_pd(__m128d a);
Duplicates lower vector element into upper vector element.
R0 | R1 |
---|---|
a0; | a0; |