The following conversion intrinsics and their respective instructions are functional in the Streaming SIMD Extensions 2 (SSE2).
For detailed information about an intrinsic, click on that intrinsic name in the following table.
The results of each intrinsic operation are placed in registers. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic. R, R0, R1, R2 and R3 represent the registers in which results are placed.
The prototypes for SSE2 intrinsics are in the emmintrin.h header file.
| Intrinsic Name | Operation | Instruction |
|---|---|---|
| Convert and pass through | CVTSI2SD | |
| _mm_cvtsd_si64 | Convert according to rounding | CVTSD2SI |
| _mm_cvttsd_si64 | Convert using truncation | CVTTSD2SI |
| _mm_cvtepi32_ps | Convert to SP FP | None |
| _mm_cvtps_epi32 | Convert from SP FP | None |
| _mm_cvttps_epi32 | Convert from SP FP using truncate | None |
__m128d _mm_cvtsi64_sd(__m128d a, __int64 b)
Converts the signed 64-bit integer value in b to a DP FP value. The upper DP FP value in a is passed through.
| R0 | R1 |
|---|---|
| (double)b | a1 |
__int64 _mm_cvtsd_si64(__m128d a)
Converts the lower DP FP value of a to a 64-bit signed integer value according to the current rounding mode.
| R |
|---|
| (__int64) a0 |
__int64 _mm_cvttsd_si64(__m128d a)
Converts the lower DP FP value of a to a 64-bit signed integer value using truncation.
| R |
|---|
| (__int64) a0 |
__m128 _mm_cvtepi32_ps(__m128i a)
Converts the 4 signed 32-bit integer values of a to SP FP values.
| R0 | R1 | R2 | R3 |
|---|---|---|---|
| (float) a0 | (float) a1 | (float) a2 | (float) a3 |
__m128i _mm_cvtps_epi32(__m128 a)
Converts the 4 SP FP values of a to signed 32-bit integer values.
| R0 | R1 | R2 | R3 |
|---|---|---|---|
| (int) a0 | (int) a1 | (int) a2 | (int) a3 |
__m128i _mm_cvttps_epi32(__m128 a)
Converts the 4 SP FP values of a to signed 32 bit integer values using truncate.
| R0 | R1 | R2 | R3 |
|---|---|---|---|
| (int) a0 | (int) a1 | (int) a2 | (int) a3 |